In recent years, as a method for manufacturing an SOI wafer, a method for delaminating an ion-implanted wafer after bonding to manufacture an SOI wafer (an ion-implantation delamination method: technology that is also called a smart cut method (a registered trademark)) has newly started to attract attention. In this ion-implantation delamination method, an oxide film is formed on at least one of two silicon wafers, and from an upper surface of one silicon wafer (a bond wafer), gas ions such as hydrogen ions or rare gas ions are implanted to form a micro bubble layer (an enclosed layer) in the wafer.
Then, the ion-implanted surface is adhered closely to the other silicon wafer (a base wafer) through the oxide film, followed by subjecting to a heat treatment (a delamination heat treatment) to delaminate one wafer (the bond wafer) in a thin film shape by using the micro bubble layer to be a cleavage surface, and additionally subjected to a heat treatment (a bonding heat treatment) to strengthen the bonding. This is such a technology to make an SOI wafer (see Patent Document 1).
This method makes the cleavage surface (delaminated surface) to be an excellent mirror surface, and relatively easily gives an SOI wafer with the SOI layer having highly uniform film thickness.
In case of manufacturing the SOI wafer by the ion-implantation delamination method, however, the SOI wafer surface after delamination has a damaged layer caused by the ion-implantation, and has a larger surface roughness compared to a mirror surface of a silicon wafer on a normal product level. Therefore, in the ion-implantation delamination method, it becomes necessary to remove such damaged layer and surface roughness. Previously, to remove this damaged layer or the like, mirror polishing with a very small polishing stock removal (a stock removal: approximately 100 nm), which is called touch polishing, has been carried out at a final step after the bonding heat treatment.
When the SOI layer is subjected to polishing including a machining element, however, since the polishing stock removal is not uniform, there arises a problem of deteriorating film thickness uniformity of the SOI layer achieved by implantation of hydrogen ions or the like and delamination.
As a method for solving such a problem, flattening treatment that improves surface roughness by performing high temperature heat treatment has been conducted in place of the aforementioned touch polishing.
For example, Patent Document 2 describes an application of a heat treatment (a rapid heating/rapid cooling heat treatment (RTA: Rapid Thermal Annealing)) in a reducing atmosphere containing hydrogen without polishing a surface of an SOI layer after a delamination heat treatment or a bonding heat treatment.
Further, Patent Document 3 describes forming an oxide film on an SOI layer by a heat treatment in an oxidizing atmosphere after a delamination heat treatment (or after a bonding heat treatment), then removing the oxide film, and subsequently applying a heat treatment (the rapid heating/rapid cooling heat treatment (RTA treatment)) in a reducing atmosphere.
Furthermore, in Patent Document 4, an SOI wafer after delamination is subjected to a sacrificial oxidation treatment subsequent to a flattening heat treatment in an atmosphere of inert gas, hydrogen gas, or a mixed gas thereof to achieve both flattening of a delaminated surface and avoidance of OSF.
As described above, flattening treatment that improves surface roughness by performing high temperature heat treatment has been conducted in place of the aforementioned touch polishing. As a result, the ion-implantation delamination method can now give an SOI wafer having a diameter of 300 mm with excellent film thickness uniformity in a mass-production level, in which the film thickness range (a value subtracted the minimum from the maximum in the plain) of the SOI layer is 3 nm or less.
With recent spread of portable terminals, reduction in power consumption, miniaturization, and high functionality of semiconductor devices are required, and a fully depleted device using an SOI wafer has been developed as a strong candidate in 22 nm and subsequent generations based on design rules. In this fully depleted device, the film thickness of an SOI layer is very thin such as 10 nm or so, and a film thickness distribution of an SOI layer affects a threshold voltage of the device, and accordingly, the radial film thickness distribution of the SOI layer is required to have uniformity in which the radial film thickness range is about 1 nm or less.
Moreover, in recent years, it has been proposed to control a threshold voltage of a device by applying a bias to a buried oxide film layer (hereinafter, also referred to as a BOX film) that is usually used for insulation from a base wafer. In this case, it is necessary to produce a Thin BOX type SOI wafer, in which the BOX film thickness is decreased, and the radial distribution of the BOX film thickness have to be highly uniform (specifically, the film thickness range is 1 nm or less).
In a method to produce such a thin film SOI wafer of a Thin BOX type, regarding the uniformity of a film thickness distribution of the SOI layer, the film thickness range of 1 nm or less is achieved by performing a multistage ion-implantation method or a method to perform temperature-fall oxidation (a method in which an oxide film is grown during temperature-falling) in an oxidation treatment after delaminating the SOI layer to offset the film thickness distribution of the SOI layer due to implant depth and the radial stock removal due to oxidation in addition to the multistage ion-implantation (see Patent Document 5).
Moreover, Patent Document 6 describes a heat treatment at a temperature of 1000° C. or more in an atmosphere of hydrogen gas, argon gas, or a mixed gas thereof as a treatment to decrease the thickness of a buried oxide film of an SOI wafer.